The present invention relates to a data processing device which incorporates a nonvolatile memory having a memory array and a controller and more particularly to technology which is useful for a microcomputer incorporating a flash memory.
Non-patent Document 1 (T. Tanaka et al., A 512 kB MONOS type Flash Memory Module Embedded in a Microcontroller, 2003 Symposium on VLSI Circuits Dig., p 211, 212) describes a 2-transistor MONOS (Metal Oxide Nitride Oxide Semiconductor) nonvolatile memory. This nonvolatile memory cell includes a control transistor and a memory transistor where the control transistor employs the same gate withstand voltage (gate oxide film thickness) as a 1.5 V MOS transistor used in a CPU. The control transistor is connected with a bit line (for the sake of convenience, the electrode of a nonvolatile memory cell connected with a bit line is called a drain) and the memory transistor is connected with a source line (for the sake of convenience, the electrode of a nonvolatile memory cell connected with a source line is called a source). For writing, high voltage is given to the source side to use source-side hot-electron injection. The control transistor gate (control gate) is fixed at 1.5 V and writing is controlled by drain-side voltage on a bit-by-bit basis. For erasing, tunneling is used to pull out electrons toward the memory transistor gate (memory gate). Erasing is concurrently done on plural memory cells which share a memory gate. Reading does not require voltage higher than 1.5 V. The region which is activated for reading should consist of a 1.5 V MOS transistor. This is because in erasing and writing, high voltage is applied to source lines and memory gates but not to bit lines.
Patent Document 1 (Japanese Unexamined Patent Publication No. 2003-46002) also describes a 2-transistor MONOS nonvolatile memory though a control transistor is connected with a source line and a memory transistor is connected with a bit line. Source-side hot-electron injection is used for writing and hot holes generated at the bit line drain side are injected for erasing. Writing and erasing are controlled by drain-side voltage on a bit-by-bit basis. Hence, it is necessary to apply high voltage to the bit line side.